Figure 1.1 (2) Block Diagram (H8/38347 Group And H8/38447 Group) - Renesas H8/3847R Series Hardware Manual

8-bit single-chip microcomputer super low power
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Section 1 Overview
P1
/TMOW
0
P1
/TMOFL
1
P1
/TMOFH
2
P1
/TMIG
3
P1
/IRQ
/ADTRG
4
4
P1
/IRQ
/TMIC
5
1
P1
/IRQ
6
P1
/IRQ
/TMIF
7
3
P2
/SCK
0
P2
1
P2
/SO
2
P3
/PWM
0
P3
/UD/EXCL
1
P3
/SCK
3
P3
/RXD
4
P3
/TXD
5
P3
/AEVH
6
P3
/AEVL
7
P4
/SCK
0
P4
/RXD
1
P4
/TXD
2
P4
/IRQ
3
P5
/WKP
/SEG
0
0
P5
/WKP
/SEG
1
1
P5
/WKP
/SEG
2
2
P5
/WKP
/SEG
3
3
P5
/WKP
/SEG
4
4
P5
/WKP
/SEG
5
5
P5
/WKP
/SEG
6
6
P5
/WKP
/SEG
7
7
Note: When the on-chip emulator is used, pins P24, P25, P26, and P27 are reserved for use exclusively by the
emulator and therefore cannot be accessed by the user.

Figure 1.1 (2) Block Diagram (H8/38347 Group and H8/38447 Group)

Rev. 6.00 Aug 04, 2006 page 8 of 680
REJ09B0145-0600
2
ROM
(60 K, 48 K, 40 K, 32 K,
24 K, and 16 K)
1
/SI
1
1
P2
3
P2
Timer A
4
P2
5
P2
6
P2
7
Timer C
P3
2
31
31
Timer F
31
Timer G
32
32
32
0
WDT
1
2
3
4
5
A/D (10-bit)
6
7
8
H8/300L
CPU
RAM
(2 K and 1 K)
Serial
communication
interface 1
Serial
communication
interface 3-1
Serial
communication
interface 3-2
14-bit PWM
LCD
controller/driver
Asynchronous
counter
Port B
Port C
V
0
V
1
V
2
V
3
PA
/COM
3
4
PA
/COM
2
3
PA
/COM
1
2
PA
/COM
0
1
P9
/SEG
7
40
P9
/SEG
6
39
P9
/SEG
5
38
P9
/SEG
4
37
P9
/SEG
3
36
P9
/SEG
2
35
P9
/SEG
1
34
P9
/SEG
0
33
P8
/SEG
7
32
P8
/SEG
6
31
P8
/SEG
5
30
P8
/SEG
4
29
P8
/SEG
3
28
P8
/SEG
2
27
P8
/SEG
1
26
P8
/SEG
0
25
P7
/SEG
7
24
P7
/SEG
6
23
P7
/SEG
5
22
P7
/SEG
4
21
P7
/SEG
3
20
P7
/SEG
2
19
P7
/SEG
1
18
P7
/SEG
0
17
P6
/SEG
7
16
P6
/SEG
6
15
P6
/SEG
5
14
P6
/SEG
4
13
P6
/SEG
3
12
P6
/SEG
2
11
P6
/SEG
1
10
P6
/SEG
0
9

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