Universal serial bus full-speed device interface (USB)
Endpoint
Type
OUT
1. Endpoint in NAK Status.
Double-buffering feature for a bulk endpoint is activated by:
•
Writing EP_TYPE bit field at '00 in its USB_EPnR register, to define the endpoint as a
bulk, and
•
Setting EP_KIND bit at '1 (DBL_BUF), in the same register.
The application software is responsible for DTOG and SW_BUF bits initialization according
to the first buffer to be used; this has to be done considering the special toggle-only property
that these two bits have. The end of the first transaction occurring after having set
DBL_BUF, triggers the special flow control of double-buffered bulk endpoints, which is used
for all other transactions addressed to this endpoint until DBL_BUF remain set. At the end of
each transaction the CTR_RX or CTR_TX bit of the addressed endpoint USB_EPnR
register is set, depending on the enabled direction. At the same time, the affected DTOG bit
in the USB_EPnR register is hardware toggled making the USB peripheral buffer swapping
completely software independent. Unlike common transactions, and the first one after
DBL_BUF setting, STAT bit pair is not affected by the transaction termination and its value
remains '11 (Valid). However, as the token packet of a new transaction is received, the
actual endpoint status will be masked as '10 (NAK) when a buffer conflict between the USB
peripheral and the application software is detected (this condition is identified by DTOG and
SW_BUF having the same value, see
responds to the CTR event notification by clearing the interrupt flag and starting any
required handling of the completed transaction. When the application packet buffer usage is
over, the software toggles the SW_BUF bit, writing '1 to it, to notify the USB peripheral about
the availability of that buffer. In this way, the number of NAKed transactions is limited only by
the application elaboration time of a transaction data: if the elaboration time is shorter than
the time required to complete a transaction on the USB bus, no re-transmissions due to flow
control will take place and the actual transfer rate will be limited only by the host PC.
The application software can always override the special flow control implemented for
double-buffered bulk endpoints, writing an explicit status different from '11 (Valid) into the
STAT bit pair of the related USB_EPnR register. In this case, the USB peripheral will always
use the programmed endpoint status, regardless of the buffer usage condition.
32.5.4
Isochronous transfers
The USB standard supports full speed peripherals requiring a fixed and accurate data
production/consume frequency, defining this kind of traffic as 'Isochronous'. Typical
1015/1080
Table 172. Bulk double-buffering memory buffers usage (continued)
Packet buffer used by USB
DTOG SW_BUF
ADDRn_RX_0 / COUNTn_RX_0
0
1
Buffer description table locations.
ADDRn_RX_1 / COUNTn_RX_1
1
0
Buffer description table locations.
0
0
1
1
DocID025202 Rev 7
Peripheral
(1)
None
(1)
None
Table 172 on page
1014). The application software
Packet buffer used by
Application Software
ADDRn_RX_1 / COUNTn_RX_1
Buffer description table locations.
ADDRn_RX_0 / COUNTn_RX_0
Buffer description table locations.
ADDRn_RX_0 / COUNTn_RX_0
Buffer description table locations.
ADDRn_RX_1 / COUNTn_RX_1
Buffer description table locations.
RM0365
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