Debug support (DBG)
33.15.8
TRACECLKIN connection inside the STM32F302xx
In the STM32F302xx, this TRACECLKIN input is internally connected to HCLK. This means
that when in asynchronous trace mode, the application is restricted to use to time frames
where the CPU frequency is stable.
Note:
Important: when using asynchronous trace: it is important to be aware that:
The default clock of the STM32F302xx MCUs is the internal RC oscillator. Its frequency
under reset is different from the one after reset release. This is because the RC calibration
is the default one under system reset and is updated at each system reset release.
Consequently, the trace port analyzer (TPA) should not enable the trace (with the
TRACE_IOEN bit) under system reset, because a Synchronization Frame Packet will be
issued with a different bit time than trace packets which will be transmitted after reset
release.
1063/1080
DocID025202 Rev 7
RM0365
Need help?
Do you have a question about the RM0365 and is the answer not in the manual?
Questions and answers