ST STM32L4+ Series Reference Manual page 1970

Secure digital input/output MultiMediaCard interface (SDMMC)
The clock will be restarted when the command/response CPSM or data path DPSM is
activated (enabled).
The I/O management subunit takes care of the SDMMC_Dn and SDMMC_CMD I/O
direction signals, which controls the external voltage transceiver.
Command/Response path
The Command/Response path subunit transfers commands and responses on the
SDMMC_CMD line. The Command path is clocked on the SDMMC_CK and sends
commands to the card,.The Response path is clocked on the sdmmc_rx_ck and receives
responses from the card.
Command/Response path state machine (CPSM)
•
When the command register is written to and the enable bit is set, command transfer
starts. When the command has been sent the CRC is appended and the command
path state machine (CPSM) sets the status flags and:
–
–
•
When the response is received,
–
–
When ever the CPSM is active, i.e. not in the Idle state, the CPSMACT bit is set.
1970/2301
Figure 576. Command/Response path
Registers
Response
registers
Command
registers
if a response is not required enters the Idle state.
If a response is required, it waits for the response.
for a response with CRC, the received CRC code and the internally generated
code are compared, and the appropriate status flag is set according the result.
for a response without CRC, no CRC is checked, and the appropriate status flag is
not set.
To control unit
Command / Response
path
Status Command Control
flag timer logic
Response
shift CRC
register
Command
shift CRC
register
RM0432 Rev 6
in
SDMMC_CMD
sdmmc_rx_ck
out
SDMMC_CK
RM0432
MSv40160V2