ST STM32L4+ Series Reference Manual page 1967

RM0432
Signal name
SDMMC_D[7:0]
SDMMC_D0DIR
SDMMC_D123DIR Digital output
54.5.3 General description
The SDMMC_D[7:0] lines have different operating modes:
•
By default, SDMMC_D0 line is used for data transfer. After initialization, the host can
change the databus width.
•
For an e•MMC, 1-bit (SDMMC_D0), 4-bit (SDMMC_D[3:0]) or 8-bit (SDMMC_D[7:0])
data bus widths can be used.
• For an SD or an SDIO card, 1-bit (SDMMC_D0) or 4-bit (SDMMC_D[3:0]) can be used.
All data lines operate in push-pull mode.
To allow the connection of an external driver (a voltage switch transceiver), the direction of
data flow on the data lines is indicated with I/O direction signals. The SDMMC_D0DIR signal
indicates the I/O direction for the SDMMC_D0 data line, the SDMMC_D123DIR for the
SDMMC_D[3:1] data lines.
SDMMC_CMD only operates in push-pull mode:
To allow the connection of an external driver (a voltage switch transceiver), the direction of
data flow on the SDMMC_CMD line is indicated with the I/O direction signal SDMMC_CDIR.
SDMMC_CK clock to the card originates from sdmmc_ker_ck:
•
When the sdmmc_ker_ck clock has 50 % duty cycle, it can be used even in bypass
mode (CLKDIV = 0).
•
When the sdmmc_ker_ck duty cycle is not 50 %, the CLKDIV must be used to divide it
by 2 or more (CLKDIV > 0).
• The phase relation between the SDMMC_CMD / SDMMC_D[7:0] outputs and the
SDMMC_CK can be selected through the NEGEDGE bit. The phase relation depends
on the CLKDIV, NEGEDGE, and DDR settings. See
SDMMC_CMD
SDMMC_Dn
SDMMC_CK
sdmmc_ker_ck
Secure digital input/output MultiMediaCard interface (SDMMC)
Table 386. SDMMC pins (continued)
Signal type
Digital
SD/SDIO/e•MMC card bidirectional data lines.
input/output
SD/SDIO/e•MMC card I/O direction indication for the
Digital output
SDMMC_D0 data line.
SD/SDIO/e•MMC card I/O direction indication for the data lines
SDMMC_D[3:1].
Figure 574. SDMMC Command and data phase relation
CLKDIV > 0
DDR = 0
CLKDIV = 0 NEGEDGE = 0
RM0432 Rev 6
Description
Figure 574.
CLKDIV > 0 CLKDIV > 0
DDR = 0 DDR = 1
NEGEDGE = 1 NEGEDGE = 0
CLKDIV > 0
DDR = 1
NEGEDGE = 1
MSv40159V2
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