Revision History; Table 196. Document Revision History - STMicroelectronics RM0365 Reference Manual

RM0365
35

Revision history

Date
25-Apr-2014
16-May-2014
11-Sep-2014

Table 196. Document revision history

Revision
1 Initial release.
Updated the content of:
– Section 9: System configuration controller
– Section 25: Inter-integrated circuit (I2C)
Updated the colors only (not the content) of:
– Figure: Transfer bus diagrams for I2C slave
2
– Figure: Transfer bus diagrams for I2C slave
– Figure: Transfer bus diagrams for I2C master
– Figure: Transfer bus diagrams for SMBus slave transmitter
– Figure: Transfer bus diagrams for SMBus slave transmitter
(SBC=1),.
Updated the following chapters:
Overview of the manual
– Updated Table: Available features related to each product
Analog-to-digital converters
– Figure: ADC block diagram,
– Figure: ADC block diagram,
– Figure: VBAT channel block diagram,
– Section: ADC configuration register (ADCx_CFGR, x=1..2),
– Section: ADC Analog Watchdog 2 Configuration Register
(ADCx_AWD2CR, x=1..2),
– Section: ADC Analog Watchdog 3 Configuration Register
(ADCx_AWD3CR, x=1..2),
– Section: ADC Differential Mode Selection Register (ADCx_DIFSEL,
x=1..2)
3
Reset and Clock (RCC)
– Figure: STM32F318x8STM32F3xx clock tree,
– Section: Clock configuration register 3 (RCC_CFGR3),
– Section: Control/status register (RCC_CSR),
– Section: RCC register map.
System configuration controller (SYSCFG)
– Section: SYSCFG configuration register 2 (SYSCFG_CFGR2)
– Section: SYSCFG register map.
Interrupts and events
– Table: STM32F302xB/C/D/E vector table.
Operational amplifier (OPAMP)
– Figure: STM32F302xB/C/D/E comparator and operational amplifier
connections.
DocID025202 Rev 7
Revision history
Changes
(SYSCFG).
interface.
transmitter,
receiver,
transmitter,
(SBC=1),
1072/1080
1079