STMicroelectronics RM0365 Reference Manual page 1073

Revision history
Date
22-Jan-2015
1073/1080
Table 196. Document revision history (continued)
Revision
Added Section: Peripheral interconnect matrix.
Extended the applicability to STM32F302xD/E devices.
Updated the following chapters:
Overview of the manual
– Table: Available features related to each product
System and memory overview
– Section: System architecture
– Table: STM32F302xD/E peripheral register boundary addresses
(new table)
– Section: Embedded SRAM
Embedded Flash memory
– Section: Flash main features
– Section Flash memory functional description
– Table: Flash module organization
Option byte description
– Table: Option byte organization
– Table: Description of the option bytes
4
Flexible memory controller (FMC)
– New chapter.
Power control (PWR)
– Section: Independent A/D and D/A converter supply and reference
voltage
Reset and clock control (RCC)
– Section: Clocks
– Section: RCC registers
General purpose I/Os (GPIO)
– Section : GPIO main features
– Section: GPIO registers
System configuration controller
– Section: SYSCFG registers
Direct memory access controller (DMA)
– Table: STM32F302xB/C/D/E summary of DMA1 requests for each
channel
– Table: STM32F302xB/C/D/E summary of DMA2 requests for each
channel
DocID025202 Rev 7
Changes
RM0365