Hitachi SH7751 Hardware Manual page 22

Figure 4.16 Store Queue Configuration .............................................................................. 113
Figure 5.1 Register Bit Configurations ............................................................................. 120
Figure 5.2 Instruction Execution and Exception Handling ............................................... 125
Figure 5.3 Example of General Exception Acceptance Order .......................................... 127
Figure 6.1 Format of Single-Precision Floating-Point Number ........................................ 155
Figure 6.2 Format of Double-Precision Floating-Point Number....................................... 156
Figure 6.3 Single-Precision NaN Bit Pattern..................................................................... 158
Figure 6.4 Floating-Point Registers................................................................................... 160
Figure 8.1 Basic Pipelines ................................................................................................. 188
Figure 8.2 Instruction Execution Patterns ......................................................................... 189
Figure 8.3 Examples of Pipelined Execution .................................................................... 201
Figure 9.1 STATUS Output in Power-On Reset ............................................................... 230
Figure 9.2 STATUS Output in Manual Reset ................................................................... 231
Figure 9.3 STATUS Output in Standby
Figure 9.4 STATUS Output in Standby
Figure 9.5 STATUS Output in Standby
Figure 9.6 STATUS Output in Sleep
Figure 9.7 STATUS Output in Sleep
Figure 9.8 STATUS Output in Sleep
Figure 9.9 STATUS Output in Deep Sleep
Figure 9.10 STATUS Output in Deep Sleep
Figure 9.11 STATUS Output in Deep Sleep
Figure 9.12 Hardware Standby Mode Timing (When CA = Low in Normal Operation) ... 238
Figure 9.13 Hardware Standby Mode Timing (When CA = Low in WDT Operation)....... 239
Figure 9.14 Timing When Power Other than VDD-RTC is Off ......................................... 239
Figure 9.15 Timing When VDD-RTC Power is Off
Figure 10.1(1) Block Diagram of CPG (SH7751) ................................................................... 243
Figure 10.1(2) Block Diagram of CPG (SH7751R)................................................................. 244
Figure 10.2 Block Diagram of WDT................................................................................... 253
Figure 10.3 Writing to WTCNT and WTCSR .................................................................... 257
Figure 10.4 Points for Attention when Using Crystal Resonator ........................................ 260
Figure 10.5 Points for Attention when Using PLL Oscillator Circuit ................................. 261
Figure 11.1 Block Diagram of RTC.................................................................................... 264
Figure 11.2 Examples of Time Setting Procedures ............................................................. 281
Figure 11.3 Examples of Time Reading Procedures ........................................................... 283
Figure 11.4 Example of Use of Alarm Function ................................................................. 284
Figure 11.5 Example of Crystal Oscillator Circuit Connection .......................................... 286
Figure 12.1 Block Diagram of TMU................................................................................... 288
Figure 12.2 Example of Count Operation Setting Procedure .............................................. 299
Figure 12.3 TCNT Auto-Reload Operation......................................................................... 299
Figure 12.4 Count Timing when Operating on Internal Clock............................................ 300
Figure 12.5 Count Timing when Operating on External Clock........................................... 300
Figure 12.6 Count Timing when Operating on On-Chip RTC Output Clock ..................... 301

Interrupt Sequence ........................................ 231

Power-On Reset Sequence ............................ 232

Manual Reset Sequence ................................ 233

Interrupt Sequence ............................................ 233

Power-On Reset Sequence ................................ 234

Manual Reset Sequence .................................... 235

Interrupt Sequence ................................... 236

Power-On Reset Sequence....................... 236

Manual Reset Sequence ........................... 237

On ................................................ 240
Rev. 3.0, 04/02, page xxi of xxxviii