Hitachi SH7751 Hardware Manual page 45

Superh risc engine
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Table 1.1
SH7751 Series Features (cont)
Item
Cache memory
[SH7751]
Cache memory
[SH7751R]
Rev. 3.0, 04/02, page 6 of 1064
Features

Instruction cache (IC)

8 kbytes, direct mapping

256 entries, 32-byte block length

Normal mode (8-kbyte cache)

Index mode

Operand cache (OC)

16 kbytes, direct mapping

512 entries, 32-byte block length

Normal mode (16-kbyte cache)

Index mode

RAM mode (8-kbyte cache + 8-kbyte RAM)

Choice of write method (copy-back or write-through)

Single-stage copy-back buffer, single-stage write-through buffer

Cache memory contents can be accessed directly by address mapping
(usable as on-chip memory)

Store queue (32 bytes

Instruction cache (IC)

16 kbytes, 2-way set associative

256 entries/way, 32-byte block length

Cache-double-mode (16-kbyte cache)

Index mode

SH7751-compatible mode (8 kbytes, direct mapping)

Operand cache (OC)

32 kbytes, 2-way set associative

512 entries/way, 32-byte block length

Cache-double-mode (32-kbyte cache)

Index mode

RAM mode (16-kbyte cache + 16-kbyte RAM)

Choice of write method (copy-back or write-through)

SH7751-compatible mode (16 kbytes, direct mapping)

Single-stage copy-back buffer, single-stage write-through buffer

Cache memory contents can be accessed directly by address mapping
(usable as on-chip memory)

Store queue (32 bytes

2 entries)

2 entries)

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