Hitachi SH7751 Hardware Manual page 66

Table 1.3 Pin Functions (cont)
Pin
No. Number Pin Name
87 W8 D24
88 Y8 D25
89 U9 D26
90 V9 D27
91 W9 D28
92 Y9 D29
93 V10 VDDQ
94 W6 VSSQ
95 W10 D30
96 Y10 D31
97 U10 VDD
98 U11 VSS
99 V11 A18
100 Y11 A19
101 U12 A20
102 V12 A21
103 W12 A22
104 Y12 A23
105 V14 VDDQ
106 W11 VSSQ
107 U13 A24
108 V13 A25

109 W13 /

 

110 Y13 /


111 U14 VDD
112 U15 VSS

113 Y14

 
114 V15

 
115 Y15
I/O Function
I/O Data
I/O Data
I/O Data
I/O Data
I/O Data
I/O Data
Power IO VDD
Power IO GND
I/O Data
I/O Data
Power Internal VDD
Power Internal GND
O Address
O Address
O Address
O Address
O Address
O Address
Power IO VDD
Power IO GND
O Address
O Address
O D23–D16 select
signal
O D31–D24 select
signal
Power Internal VDD
Power Internal GND
I Sleep
O Bus grant (host
function)
O Bus grant (host
function)
Reset SRAM DRAM


Rev. 3.0, 04/02, page 27 of 1064
Memory Interface
SDRAM PCMCIA

 


MPX
A24
A25
ACCSIZE0
ACCSIZE1
ACCSIZE2