Hitachi SH7751 Hardware Manual page 47

Superh risc engine
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Table 1.1
SH7751 Series Features (cont)
Item
Direct memory
access controller
(DMAC)
Timer unit (TMU)
Realtime clock
(RTC)
Serial
communication
interface
(SCI, SCIF)
Rev. 3.0, 04/02, page 8 of 1064
Features

Physical address DMA controller

SH7751: 4-channel

SH7751R: 8-channel

Transfer data size: 8, 16, 32, or 64 bits, or 32 bytes

Address modes:

1-bus-cycle single address mode

2-bus-cycle dual address mode

Transfer requests: External, on-chip peripheral module, or auto-requests

Bus modes: Cycle-steal or burst mode

Supports on-demand data transfer mode (external bus 32 bit)

5-channel auto-reload 32-bit timer
Input-capture function on one channel

Selection from 7 counter input clocks in 3 of 5 channels and from 5
counter input clocks on remaining 2 of 5 channels

On-chip clock and calendar functions

Built-in 32 kHz crystal oscillator with maximum 1/256 second resolution
(cycle interrupts)

Two full-duplex communication channels (SCI, SCIF)

Channel 1 (SCI):

Choice of asynchronous mode or synchronous mode

Supports smart card interface

Channel 2 (SCIF):

Supports asynchronous mode

Separate 16-byte FIFOs provided for transmitter and receiver

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