Chapter 23
Configuring Channelized T1 Interfaces
Channelized T1 IQ and IQE Interfaces Overview
Configuring Channelized T1 IQ and IQE Interfaces
Configuring T1 IQ and IQE Interfaces
Channelized T1 IQ and IQE Interfaces Overview on page 505
Configuring Channelized T1 IQ and IQE Interfaces on page 505
Example: Configuring Channelized T1 IQ and IQE Interfaces on page 509
The Channelized T1 intelligent queuing (IQ) and enhanced intelligent queuing (IQE)
PICs have 10 T1 ports that you can channelize to the DS0 level. Each T1 interface
has 24 DS0 time slots. You can combine DS0 time slots (channels) to create a channel
group (NxDS0).
The Channelized T1 IQ and IQE PICs are supported on the M7i, M10i, M20, M40e,
M120, and M320 routers.
Configuring T1 IQ and IQE Interfaces on page 505
Configuring Fractional T1 IQ and IQE Interfaces on page 506
Configuring NxDS0 IQ and IQE Interfaces on page 507
Configuring Payload Loopback on page 507
Configuring Channelized T1 Interface Properties on page 509
To configure a T1 interface, include the no-partition and interface-type statements at
the [edit interfaces ct1-fpc/pic/port] hierarchy level:
[edit interfaces ct1-fpc/pic/port]
no-partition interface-type t1;
This configuration creates the interface t1-fpc/pic/port .
Channelized T1 IQ and IQE Interfaces Overview
505