Juniper JUNOS 10.1 - CONFIGURATION GUIDE 1-2010 Configuration Manual page 473

For channelized IQ and IQE interfaces, there are some limitations on where you
place certain statements in the configuration. When you configure clocking, bit error
rate testing (BERT), C-bit parity, and loopback statements on T3, T1, or DS0 channels,
you must follow these guidelines:
Structure of Channelized IQ and Channelized IQE PICs
Figure 21 on page 404 through Figure 33 on page 409 show the structural organization
of the channelized PICs, channelized IQ PICs, and channelized IQE PICs. Table 38
For T3 IQ interfaces, you can include the
[edit interfaces ct3-fpc/pic/port]
hierarchy levels. For T1 interfaces, you can include the
at the [edit interfaces t1-fpc/pic/port:channel]
included at the
[edit interfaces ct1-fpc/pic/port]
interfaces, payload and remote loopback are the same. If you configure one, the
other is ignored. NxDS0 IQ interfaces do not support local loopback.
If you include clocking, BERT, and C-bit parity configurations at both the
[edit interfaces ct3-fpc/pic/port<:channel> t3-options]
t3-fpc/pic/port<:channel> t3-options]
statements are valid, and the T3-level statements are ignored.
If you include clocking, BERT, and C-bit parity configurations at both the
[edit interfaces ct3-fpc/pic/port<:channel> t3-options]
t1-fpc/pic/port<:channel> t1-options]
statements are operational for the T3 connections and the T1-level statements
are operational for the T1 connections.
Because DS0 channels do not have clocking capability, you must configure
clocking at the
[edit interfaces ct1-fpc/pic/port<:channel> t1-options]
[edit interfaces ce1-fpc/pic/port<:channel> e1-options]
channelized NxDS0 IQ interfaces.
You can set BERT at the
[edit interfaces t3-fpc/pic/port<:channel> t3-options]
hierarchy level or on any partitioned channel of the channelized T3 interface.
There are 12 BERT patterns available for NxDS0 channels and 28 BERT patterns
for T1, channelized T1, T3, and channelized T3 interfaces within channelized
IQ interfaces.
For channelized IQ and IQE PICs, SONET/SDH level, use the
statement and
local remote
coc12, cstm4, coc3, cstm1). It is ignored for path-level interfaces
or
so-fpc/pic/port:channel
For channelized interfaces that use Frame Relay encapsulation, the number of
configurable DLCIs varies by channelized interface type.
For channelized interfaces, you can configure class of service (CoS) on channels,
but not at the controller level.
For original Channelized OC12 PICs, limited CoS functionality is supported. For
more information, contact Juniper Networks customer support.
CoS is not configurable on controller interfaces.
Structure of Channelized IQ and Channelized IQE PICs
loopback payload
and [edit interfaces t3-fpc/pic/port:channel]
hierarchy level; it is ignored if
hierarchy level. For NxDS0
hierarchy levels, the channelized T3-level
hierarchy levels, the channelized T3-level
options at the controller interface (coc48, cstm16,
.
Chapter 17: Channelized Interfaces
statement at the
statement
loopback payload
and [edit interfaces
and [edit interfaces
or
hierarchy level for
sonet-options loopback
so-fpc/pic/port
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