Juniper JUNOS 10.1 - CONFIGURATION GUIDE 1-2010 Configuration Manual page 472

JUNOS 10.1 Network Interfaces Configuration Guide
E1 and T1 time slots unused by ISDN PRI can operate normally as DS0 interfaces.
PRI B-channels run at 64 Kbps, but do not support the 56-Kbps line rate.
For more information about Channelized E1 PIMs, ISDN PRI connectivity, and the
ISDN features they support, see the JUNOS Software Interfaces and Routing
Configuration Guide.
Channelized IQ and IQE Interfaces Properties
On channelized IQ and IQE interfaces, you can specify options that are globally
applied to all interface types associated with channelized IQ and IQE interfaces. For
example,
hierarchy level apply globally to all E1 and NxDS0 interfaces that you create by
partitioning
[edit interfaces ct3-fpc/pic/port]
interfaces that you create by partitioning
You can also apply interface options at the channel level. For example, you can
include
hierarchy level, and
hierarchy level.
Only a subset of the interface options is valid on each type of channelized IQ interface.
You configure all HDLC information at the end-data channel level, not at the parent
level. For example, configure HDLC information at the
ds-fpc/pic/port<:channel>]
ct1-fpc/pic/port<:channel>]
Automatic Protection Switching (APS) is supported on channelized OC3, OC12, STM1,
and STM4 IQ interfaces. To configure APS, include the
at the
about configuring APS, see "Configuring APS and MSP" on page 911.
In interchassis and intrachassis redundant LSQ configurations that use MLPPP and
SONET APS, you can inhibit a router from sending PPP termination-request messages
to the remote host if the link PIC fails. To inhibit the router from sending PPP
termination-request messages to the remote host if the link PIC fails, include the
no-termination-request statement at the
hierarchy level.
The
configurations and works with PPP, PPP over Frame Relay, and MLPPP interfaces
only. The supported PIC types are as follows:
Channelized IQ and IQE interfaces do not support receive buckets or transmit buckets.
402
Channelized IQ and IQE Interfaces Properties
statements that you include at the
e1-options
ce1-fpc/pic/port . Likewise,
statements at the
t1-options
ds0-options
hierarchy level, not at the
hierarchy level.
[edit interfaces interface-name sonet-options]
statement is supported only with MLPPP and SONET APS
no-termination-request
Channelized OC48/STM16 IQE PICs
Channelized OC12/STM4 IQ and IQE PICs
Channelized OC3 IQ and IQE PICs
Channelized STM1 IQ and IQE PICs
[edit interfaces ce1-fpc/pic/port]
t3-options statements that you include at the
hierarchy level apply globally to all T1 and NxDS0
ct3-fpc/pic/port
[edit interfaces t1-fpc/pic/port <:channel>]
statements at the [edit interfaces ds-0/1/1<:channel>]
[edit interfaces
[edit interfaces
aps
hierarchy level. For information
[edit interfaces interface-name ppp-options]
.
statement with options