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6. ROM
6.2.5
Register Configuration
The registers used to control the on-chip flash memory when enabled are shown in table 6.3. In
order to access these registers, the FLSHE bit in SYSCR3 must be set to 1.
Table 6.3
Flash Memory Registers
Register Name
Flash memory control register 1
Flash memory control register 2
Erase block register
Mode control register
System control register 3
Notes: 1. Flash memory register selection is performed by means of the FLSHE bit in system
control register 3 (SYSCR3).
2. When the FWE bit in FLMCR1 is cleared to 0, writes are invalid.
3. When a high level is input to the FWE pin, the initial value is H'80.
4. When a low level is input to the FWE pin, or if a high level is input and the SWE bit in
FLMCR1 is not set, these registers are initialized to H'00.
5. FLMCR1, FLMCR2, and EBR are 8-bit registers. Only byte accesses are valid for these
registers, the access requiring 2 states.
The registers shown in table 6.3 are for use exclusively by the flash memory version. In the mask
ROM version, a read access to the address of a register other than MDCR will always return 0, a
read access to the MDCR address will return an undefined value, and writes are invalid.
6.3
Flash Memory Register Descriptions
6.3.1
Flash Memory Control Register 1 (FLMCR1)
Bit
FWE
⎯*
Initial value
Read/Write
Note:
*
Determined by the state of the FWE pin.
FLMCR1 is an 8-bit register used for flash memory operating mode control. Program-verify mode
or erase-verify mode is entered by setting SWE to 1 when FWE = 1, then setting the
corresponding bit. Program mode is entered by setting SWE to 1 when FWE = 1, then setting the
PSU bit in FLMCR2, and finally setting the P bit. Erase mode is entered by setting SWE to 1
Rev.3.00 Jul. 19, 2007 page 126 of 532
REJ09B0397-0300
Abbr.
FLMCR1*
FLMCR2*
EBR*
MDCR
SYSCR3
7
6
5
⎯
SWE
0
0
⎯
R
R/W
R/W
5
2
R/W*
5
2
R/W*
5
2
R/W*
R
R/W
4
3
⎯
EV
0
0
⎯
R/W
Initial Value
Address
3
H'00*
H'FF80*
4
H'00*
H'FF81*
4
H'00*
H'FF83*
Undefined
H'FF89
H'00
H'FF8F
2
1
PV
E
0
0
R/W
R/W
1
1
1
0
P
0
R/W
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