Flash Memory Register Descriptions; Flash Memory Control Register (Flmcr) - Renesas H8 Series Hardware Manual

6.5

Flash Memory Register Descriptions

6.5.1

Flash Memory Control Register (FLMCR)

FLMCR is an 8-bit register used for flash memory operating mode control. Transitions to program
mode, erase mode, program-verify mode, and erase-verify mode are made by setting bits in this
register. FLMCR is initialized to H'00 upon reset, in sleep mode, subsleep mode, watch mode, and
standby mode, and when 12 V is not applied to FV
initializes FLMCR to H'80.
Bit
V
Initial value
Read/Write R
Note: * For information on access to this register, see note 11 in section 6.9, Flash Memory
Programming and Erasing Precautions.
Bit 7    Programming Power (V
FV pin. For further information, see note 5 in section 6.9, Flash Memory Programming and
PP
Erasing Precautions.
Bit 7: V Description
PP
0 Clearing condition:
When 12 V is not applied to the FV
1 Setting condition:
When 12 V is applied to the FV
Bit 3    Erase-Verify Mode (EV) * : Bit 3 selects transition to or exit from erase-verify mode.
Bit 3: EV Description
0 Exit from erase-verify mode
1 Transition to erase-verify mode
Note: * Do not set multiple bits simultaneously.
Do not release or cut the V
7 6 5
 
PP
0 0 0
 
): Bit 7 is a status flag that indicates that 12 V is applied to the
PP
or V
CC
. When 12 V is applied to FV
PP
4 3

EV
0 0
R/W *

pin
PP
pin
PP
power supply while a bit is set.
PP
Rev. 6.00 Sep 12, 2006 page 115 of 526
Section 6 ROM
, a reset
PP
2 1
PV E
0 0
R/W * R/W * R/W *
(initial value)
(initial value)
REJ09B0326-0600
0
P
0