Section 4 Clock Pulse Generators; Overview; Block Diagram - Renesas H8/38024 Hardware Manual

4.1

Overview

Clock oscillator circuitry (CPG: clock pulse generator) is provided on-chip, including both a
system clock pulse generator and a subclock pulse generator. The system clock pulse generator
consists of a system clock oscillator and system clock dividers. The subclock pulse generator
consists of a subclock oscillator circuit and a subclock divider.
In the H8/38124 Group, the system clock pulse generator includes an on-chip oscillator.
4.1.1

Block Diagram

Figure 4.1 shows a block diagram of the clock pulse generators of the H8/38024, H8/38024S, and
H8/38024F-ZTAT Group. Figure 4.2 shows a block diagram of the clock pulse generators of the
H8/38124 Group.
OSC
System clock
1
oscillator
OSC
2
System clock pulse generator
X
1
Subclock
X oscillator
2
Subclock pulse generator
Figure 4.1(1) Block Diagram of Clock Pulse Generators
(H8/38024 Group, H8/38024S Group, H8/38024F-ZTAT Group)

Section 4 Clock Pulse Generators

φ
OSC
System clock
divider (1/2)
f
( )
OSC
φ
Subclock
W
divider
f
( )
(1/2, 1/4, 1/8)
W
φ
/2
OSC
φ
/128
OSC
φ
/64
System
OSC
φ
clock
/32
OSC
divider
φ
/16
OSC
φ
/2
W
φ
/4
W
φ
/8
W
Rev. 6.00, 08/04, page 101 of 628
φ
φ/2
Prescaler S
to
(13 bits)
φ/8192
φ
W
φ
SUB
φ
/2
W
φ
/4
W
φ
/8
W
Prescaler W
to
(5 bits)
φ
/128
W