Section 4 Clock Pulse Generators; Overview; Block Diagram; System Clock And Subclock - Renesas F-ZTAT H8 Series Hardware Manual

4.1

Overview

Clock oscillator circuitry (CPG: clock pulse generator) is provided on-chip, including both a
system clock pulse generator and a subclock pulse generator. The system clock pulse generator
consists of a system clock oscillator and system clock dividers. The subclock pulse generator
consists of a subclock oscillator circuit and a subclock divider.
4.1.1

Block Diagram

Figure 4.1 shows a block diagram of the clock pulse generators.
OSC
System clock
1
oscillator
OSC
2
System clock pulse generator
X
1
Subclock
oscillator
X
2
Subclock pulse generator
Figure 4.1 Block Diagram of Clock Pulse Generators
4.1.2

System Clock and Subclock

The basic clock signals that drive the CPU and on-chip peripheral modules are φ and φ
the clock signals have names: φ is the system clock, φ
clock, and φ
is the watch clock.
W

Section 4 Clock Pulse Generators

φ
OSC
System clock
divider (1/2)
(f )
OSC
φ
W
Subclock
divider
(1/2, 1/4, 1/8)
(f )
W
φ
/2
OSC
φ
/16
System clock
OSC
divider (1/8)
φ
/2
W
φ
/4
W
φ
/8
W
is the subclock, φ
SUB
Rev.3.00 Jul. 19, 2007 page 93 of 532
4. Clock Pulse Generators
φ
φ
Prescaler S
to
(13 bits)
φ/8192
φ
φ
SUB
φ /2
φ /4
φ /8
Prescaler W
to
(5 bits)
φ /128
. Four of
SUB
is the oscillator
OSC
REJ09B0397-0300
/2
W
W
W
W
W