Hitachi SH7751 Hardware Manual page 15

15.3.2 Operation in Asynchronous Mode........................................................................ 599
15.3.3 Multiprocessor Communication Function ............................................................ 609
15.3.4 Operation in Synchronous Mode.......................................................................... 618
15.4 SCI Interrupt Sources and DMAC..................................................................................... 627
15.5 Usage Notes....................................................................................................................... 628
Section 16 Serial Communication Interface with FIFO (SCIF)
16.1 Overview ........................................................................................................................... 633
16.1.1 Features ................................................................................................................ 633
16.1.2 Block Diagram ..................................................................................................... 635
16.1.3 Pin Configuration ................................................................................................. 636
16.1.4 Register Configuration ......................................................................................... 636
16.2 Register Descriptions......................................................................................................... 637
16.2.1 Receive Shift Register (SCRSR2) ........................................................................ 637
16.2.2 Receive FIFO Data Register (SCFRDR2)............................................................ 637
16.2.3 Transmit Shift Register (SCTSR2)....................................................................... 638
16.2.4 Transmit FIFO Data Register (SCFTDR2) .......................................................... 638
16.2.5 Serial Mode Register (SCSMR2) ......................................................................... 639
16.2.6 Serial Control Register (SCSCR2) ....................................................................... 641
16.2.7 Serial Status Register (SCFSR2) .......................................................................... 644
16.2.8 Bit Rate Register (SCBRR2) ................................................................................ 650
16.2.9 FIFO Control Register (SCFCR2)........................................................................ 651
16.2.10 FIFO Data Count Register (SCFDR2) ................................................................. 654
16.2.11 Serial Port Register (SCSPTR2)........................................................................... 655
16.2.12 Line Status Register (SCLSR2)............................................................................ 662
16.3 Operation........................................................................................................................... 663
16.3.1 Overview .............................................................................................................. 663
16.3.2 Serial Operation.................................................................................................... 664
16.4 SCIF Interrupt Sources and the DMAC ............................................................................ 675
16.5 Usage Notes....................................................................................................................... 676
Section 17 Smart Card Interface
17.1 Overview ........................................................................................................................... 679
17.1.1 Features ................................................................................................................ 679
17.1.2 Block Diagram ..................................................................................................... 680
17.1.3 Pin Configuration ................................................................................................. 681
17.1.4 Register Configuration ......................................................................................... 681
17.2 Register Descriptions......................................................................................................... 682
17.2.1 Smart Card Mode Register (SCSCMR1).............................................................. 682
17.2.2 Serial Mode Register (SCSMR1) ......................................................................... 683
17.2.3 Serial Control Register (SCSCR1) ....................................................................... 684
17.2.4 Serial Status Register (SCSSR1) .......................................................................... 685
17.3 Operation........................................................................................................................... 686
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