Status Byte (Stb) And Service Request Enable Register (Sre) - R&S SGT100A User Manual

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R&S
SGT100A
read by the user. Reading the register clears it. This part is often equated with the
entire register.
ENABle
The ENABle part determines whether the associated EVENt bit contributes to the
sum bit (see below). Each bit of the EVENt part is "ANDed" with the associated
ENABle bit (symbol '&'). The results of all logical operations of this part are passed
on to the sum bit via an "OR" function (symbol '+').
ENABle bit = 0: the associated EVENt bit does not contribute to the sum bit
ENABle bit = 1: if the associated EVENt bit is "1", the sum bit is set to "1" as well.
This part can be written into and read by the user as required. Its contents are not
affected by reading.
Sum bit
The sum bit is obtained from the EVENt and ENABle part for each register. The result
is then entered into a bit of the CONDition part of the higher-order register.
The instrument automatically generates the sum bit for each register. Thus an event
can lead to a service request throughout all levels of the hierarchy.
15.1.5.3

Status Byte (STB) and Service Request Enable Register (SRE)

The STatus Byte (STB) is already defined in IEEE 488.2. It provides a rough over-
view of the instrument status by collecting the pieces of information of the lower regis-
ters. A special feature is that bit 6 acts as the sum bit of the remaining bits of the status
byte.
The STB is read using the command
The STatus Byte (STB) is linked to the Service Request Enable (SRE) register.
Each bit of the STB is assigned a bit in the SRE. Bit 6 of the SRE is ignored. If a bit is
set in the SRE and the associated bit in the STB changes from 0 to 1, a service
request (SRQ) is generated. The SRE can be set using the command
using the command *SRE?.
Table 15-2: Meaning of the bits used in the status byte
Bit No.
0...1
2
3
User Manual 1176.8674.02 ─ 07
Meaning
Not used
Error Queue not empty
The bit is set when an entry is made in the error queue. If this bit is enabled by the SRE, each
entry of the error queue generates a service request. Thus an error can be recognized and
specified in greater detail by polling the error queue. The poll provides an informative error mes-
sage. This procedure is to be recommended since it considerably reduces the problems
involved with remote control.
QUEStionable status register summary bit
The bit is set if an EVENt bit is set in the QUEStionable status register and the associated
ENABle bit is set to 1. A set bit indicates a questionable instrument status, which can be speci-
fied in greater detail by querying the STATus:QUEStionable status register.
or a serial poll.
*STB?
Annex
Remote Control Basics
and read
*SRE
541

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