Lcd Controller Operation - Motorola MPC823e Reference Manual

LCD Controller

18.3 LCD CONTROLLER OPERATION

The LCD controller uses the system interface unit to communicate with the core and external
system. It has its own DMA functionality to fetch display memory into the FIFOs for pixel
generation. The LCDCLK signal is derived from the SPLL output (VCOOUT) and is fed to
the timing generator for vertical, horizontal, and frame timing. The register set is used to
program the timing parameters for an LCD panel. Figure 18-7 illustrates the various
modules of the LCD controller.
VCOOUT CLOCK
REGISTERS
EOF IRQ
DMA CONTROLLER
18-8
DFLCD DFALCD
LCDCLK
TIMING GENERATOR
FRAME CONTROL
VERTICAL CONTROL
HORIZONTAL CONTROL
FIFOA
FIFOB
Figure 18-7. LCD Functional Module
MPC823e REFERENCE MANUAL
PIXEL
GENERATION
SHIFT/CLK
LCD_AC/LOE
FRAME/VSYNC
LOAD/HSYNC
LD[0:8]
LCD_A
LCD_B
LCD_C
MOTOROLA