Motorola MPC823e Reference Manual page 1071

Development Capabilities and Interface
Greater-than-or-equal-to and less-than-or-equal-to are easily obtained from these four
conditions. Refer to Section 20.3.1.5 Generating Compare Types for more information.
Using the AND-OR logic structures "in range" and "out of range", detections of address and
data comparators are supported. Using the counters, you can program a breakpoint to be
recognized after an event has been detected after a predefined number of times.
DEVELOPMENT
SYSTEM OR
EXTERNAL
PERIPHERALS
MASKABLE BREAKPOINT
DEVELOPMENT
NONMASKABLE BREAKPOINT
PORT
DEVELOPMENT PORT TRAP ENABLE BITS
SOFTWARE TRAP ENABLE BITS
LCTRL2
NONMASKED CONTROL BIT
MSR
RI
MSR
INTERNAL
WATCHPOINTS
WATCHPOINTS
LOGIC
Figure 20-1. Watchpoint and Breakpoint Support in the Core
The L-data comparators operate on load or store fixed-point data. When operating on
fixed-point data, the L-data comparators perform a comparison on bytes, half-words, and
words. They treat numbers as either signed or unsigned values. The comparators generate
match events and then instruction match events enter the instruction AND-OR logic where
the instruction watchpoints and breakpoint are generated. The asserted instruction
watchpoints can generate the instruction breakpoint. Two different events can decrement
one of the counters. When a counter on one of the instruction watchpoints expires, the
instruction breakpoint is asserted.
20-10
µ
CPM CODE
DEVELOPMENT
ACCESSIBLE
INTERNAL
PERIPHERALS
X
MPC823e REFERENCE MANUAL
X BIT WISE AND
X
BIT WISE OR
BREAKPOINT
X
TO CPU
COUNTERS
TO
WATCHPOINT
PINS
MOTOROLA