Development Capabilities and Interface
20.3.2 Basic Operation
20.3.2.1 INSTRUCTION SUPPORT. There are four instruction address comparators (A, B,
C, and D). Each one is 30 bits long and generates two output events—equal to and less
than. These signals generate one of four events—equal to, not equal to, greater than, or less
than. The instruction watchpoints and breakpoint are generated with these events according
to your programming. Using the OR option enables "out of range" detect.
COMPARE TYPE
EQ
COMPARE
COMPARATOR
A
LT
EQ
COMPARE
COMPARATOR
B
LT
EQ
COMPARE
COMPARATOR
C
LT
EQ
COMPARE
COMPARATOR
D
LT
Figure 20-3. Instruction Support General Structure
20-16
TYPE
LOGIC
A
B
TYPE
(A&B)
LOGIC
(A | B)
C
D
TYPE
(C&D)
LOGIC
(C | D)
TYPE
LOGIC
MPC823e REFERENCE MANUAL
CONTROL BITS
I - WATCHPOINT 0
I - WATCHPOINT 1
AND-OR
LOGIC
I - WATCHPOINT 2
I - WATCHPOINT 3
I - BREAKPOINT
MOTOROLA