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Development Capabilities and Interface
• Breakpoints and Watchpoints on Recovered Instructions (As a Result of Exceptions,
Interrupts, or Miss Prediction) Are Not Reported and Do Not Change the Timing of the
Machine.
• Instructions with Instruction Breakpoints Are Not Executed. The Machine Branches to
the Breakpoint Exception Routine Before it Executes the Instruction.
• Instructions with Load/Store Breakpoints Are Executed. The Machine Branches to the
Breakpoint Exception Routine After it Executes the Instruction. The Address of the
Access is Placed in the Breakpoint Address Register.
• Load/Store Multiple and String Instructions with Load/Store Breakpoints First Finish
Execution and Then the Machine Branches to the Breakpoint Exception Routine.
• Load/Store Data Compare is Made On the Load/Store, After Swap in Store Accesses
and Before Swap in Load Accesses (As the Data Appears on the Bus).
• Internal Breakpoints Operate with a Context-Dependent Filter.
• Both "go to x" and "continue" Working Modes are Supported for Instruction Breakpoints.
20.3.1.1 RESTRICTIONS. There are times when the same watchpoint can be detected
more than once during the execution of a single instruction. For example, a load/store
watchpoint detected on more than one transfer when executing load/store multiple/string or
load/store watchpoint detected on more than one byte when working in byte mode. In these
cases, only one watchpoint of the same type is reported for a single instruction. Similarly,
only one watchpoint of the same type can be counted in the counters for a single instruction.
Since watchpoint events are reported when the instruction that caused the event retires
(more than one instruction can retire from the machine in a single clock), ensuing events can
be reported in the same clock. Moreover, if the same event is detected on more than one
instruction (tight loops or range detection), it can just be reported once. The internal counters
count correctly in these cases.
20.3.1.2 BYTE AND HALF-WORD WORKING MODES. You can use watchpoints and
breakpoints to detect matches on bytes and half-words when the byte/half-word is accessed
in a load/store instruction of larger data widths. For example, when loading a table of bytes
using a series of load word instructions. To use this feature in word mode, you must write
the required match value to the correct half-word of the data comparator and to the mask in
the L-data comparator. If you prefer to break on bytes, the byte mask for each L-comparator
and the bytes to be matched must be written in the data comparator.
Since bytes and half-words can be accessed using a larger data width instruction, it is
impossible for you to predict the exact value of the L-address lines when the requested byte/
half-word is accessed. If the matched byte is byte 2 of the word and is accessed using a load
word instruction, the L-address value will be of the word (byte 0). Therefore, the core masks
the two least-significant bits of the L-address comparators when a word access is performed
and the least-significant bits when a half-word access is performed. Address range is only
supported when aligned according to the access size.
20-12
MPC823e REFERENCE MANUAL
MOTOROLA
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