Motorola MPC823e Reference Manual page 1004

The MPC823e LCD controller is a module that is separate from the core and communication
processor module. It uses the internal DMA, bus, and system interface unit to access frame
buffer memory. The LCD controller has dedicated registers that provide timing generation
to control the panel. It also has two FIFOs that interface to color RAM, which provides pixel
generation and a data path to the panel. The LCD controller block diagram is illustrated in
Figure 18-6.
REGISTERS
CONTROL
FIFOS
Figure 18-6. LCD Controller Block Diagram
MOTOROLA
TIMING GENERATION
DMA ADDRESS
MODES
COLOR
RAM
MPC823e REFERENCE MANUAL
LCD Controller
FRAME
SHIFT
LOAD
LCD_AC
LCD
INTERFACE
LCD DATA
18-7