Texas Instruments SimpleLink CC2620 Technical Reference Manual page 1314

AUX – Sensor Controller Registers
17.7.7.19 MODCLKEN1 Register (Offset = 5Ch) [reset = 0h]
MODCLKEN1 is shown in
Module Clock Enable 1
Clock enable for each module in the AUX domain, for use by the AUX_SCE. Settings take effect
immediately.
The settings in this register are OR'ed with the corresponding settings in MODCLKEN0. This allows
system CPU and AUX_SCE to request clocks independently.
31 30
23 22
15 14
7 6
AUX_ADI4 AUX_DDI0_OS
C
R/W-0h R/W-0h
Bit Field
31-8 RESERVED
7 AUX_ADI4
6 AUX_DDI0_OSC
5 TDC
4 ANAIF
3 TIMER
2 AIODIO1
1 AIODIO0
0 SMPH
1314
AUX – Sensor Controller with Digital and Analog Peripherals
Figure 17-80 and described in
Figure 17-80. MODCLKEN1 Register
29 28
RESERVED
R-0h
21 20
RESERVED
R-0h
13 12
RESERVED
R-0h
5 4
TDC ANAIF
R/W-0h R/W-0h
Table 17-105. MODCLKEN1 Register Field Descriptions
Type Reset
R 0h
R/W 0h
R/W 0h
R/W 0h
R/W 0h
R/W 0h
R/W 0h
R/W 0h
R/W 0h
Copyright © 2015, Texas Instruments Incorporated
Table 17-105.
27 26
19 18
11 10
3 2
TIMER AIODIO1
R/W-0h R/W-0h
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Enables (1) or disables (0) clock for AUX_ADI4.
0h = AUX_SCE has not requested clock for AUX_ADI4
1h = AUX_SCE has requested clock for AUX_ADI4
Enables (1) or disables (0) clock for AUX_DDI0_OSC.
0h = AUX_SCE has not requested clock for AUX_DDI0_OSC
1h = AUX_SCE has requested clock for AUX_DDI0_OSC
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Enables (1) or disables (0) clock for AUX_ANAIF.
0h = AUX_SCE has not requested clock for ANAIF
1h = AUX_SCE has requested clock for ANAIF
Enables (1) or disables (0) clock for AUX_TIMER.
0h = AUX_SCE has not requested clock for TIMER
1h = AUX_SCE has requested clock for TIMER
Enables (1) or disables (0) clock for AUX_AIODIO1.
0h = AUX_SCE has not requested clock for AIODIO1
1h = AUX_SCE has requested clock for AIODIO1
Enables (1) or disables (0) clock for AUX_AIODIO0.
0h = AUX_SCE has not requested clock for AIODIO0
1h = AUX_SCE has requested clock for AIODIO0
Enables (1) or disables (0) clock for AUX_SMPH.
0h = AUX_SCE has not requested clock for SMPH
1h = AUX_SCE has requested clock for SMPH
SWCU117C – February 2015 – Revised September 2015
www.ti.com
25 24
17 16
9 8
1 0
AIODIO0 SMPH
R/W-0h R/W-0h
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