Texas Instruments SimpleLink CC2620 Technical Reference Manual page 1615

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23.8.2.5 RFCPEIFG Register (Offset = 10h) [reset = 0h]
RFCPEIFG is shown in
Interrupt Flags For Command and Packet Engine Generated Interrupts
31 30
INTERNAL_ER BOOT_DONE
ROR
R/W-0h R/W-0h
23 22
RX_ENTRY_D RX_BUF_FULL
ONE
R/W-0h R/W-0h
15 14
IRQ15 IRQ14
R/W-0h R/W-0h
7 6
TX_CTRL_ACK TX_CTRL
R/W-0h R/W-0h
Bit Field
31 INTERNAL_ERROR
30 BOOT_DONE
29 MODULES_UNLOCKED
28 SYNTH_NO_LOCK
27 IRQ27
26 RX_ABORTED
25 RX_N_DATA_WRITTEN
24 RX_DATA_WRITTEN
23 RX_ENTRY_DONE
22 RX_BUF_FULL
21 RX_CTRL_ACK
SWCU117C – February 2015 – Revised September 2015
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Figure 23-25 and described in
Figure 23-25. RFCPEIFG Register
29 28
MODULES_UN SYNTH_NO_L
LOCKED OCK
R/W-0h R/W-0h
21 20
RX_CTRL_AC RX_CTRL
K
R/W-0h R/W-0h
13 12
IRQ13 IRQ12
R/W-0h R/W-0h
5 4
TX_ACK TX_DONE
R/W-0h R/W-0h
Table 23-169. RFCPEIFG Register Field Descriptions
Type Reset
R/W 0h
R/W 0h
R/W 0h
R/W 0h
R/W 0h
R/W 0h
R/W 0h
R/W 0h
R/W 0h
R/W 0h
R/W 0h
Copyright © 2015, Texas Instruments Incorporated
Table 23-169.
27 26
IRQ27 RX_ABORTED
R/W-0h R/W-0h
19 18
RX_EMPTY RX_IGNORED
R/W-0h R/W-0h
11 10
TX_BUFFER_C TX_ENTRY_D
HANGED ONE
R/W-0h R/W-0h
3 2
LAST_FG_CO FG_COMMAN
MMAND_DON D_DONE
E
R/W-0h R/W-0h
Description
Interrupt flag 31. The command and packet engine (CPE) has
observed an unexpected error. A reset of the CPE is needed. This
can be done by switching the RF Core power domain off and on in
PRCM:PDCTL1RFC. Write zero to clear flag. Write to one has no
effect.
Interrupt flag 30. The command and packet engine (CPE) boot is
finished. Write zero to clear flag. Write to one has no effect.
Interrupt flag 29. As part of command and packet engine (CPE) boot
process, it has opened access to RF Core modules and memories.
Write zero to clear flag. Write to one has no effect.
Interrupt flag 28. The phase-locked loop in frequency synthesizer
has reported loss of lock. Write zero to clear flag. Write to one has
no effect.
Interrupt flag 27. Write zero to clear flag. Write to one has no effect.
Interrupt flag 26. Packet reception stopped before packet was done.
Write zero to clear flag. Write to one has no effect.
Interrupt flag 25. Specified number of bytes written to partial read Rx
buffer. Write zero to clear flag. Write to one has no effect.
Interrupt flag 24. Data written to partial read Rx buffer. Write zero to
clear flag. Write to one has no effect.
Interrupt flag 23. Rx queue data entry changing state to finished.
Write zero to clear flag. Write to one has no effect.
Interrupt flag 22. Packet received that did not fit in Rx queue. BLE
mode: Packet received that did not fit in the Rx queue. IEEE
802.15.4 mode: Frame received that did not fit in the Rx queue.
Write zero to clear flag. Write to one has no effect.
Interrupt flag 21. BLE mode only: LL control packet received with
CRC OK, not to be ignored, then acknowledgement sent. Write zero
to clear flag. Write to one has no effect.
Radio Registers
25 24
RX_N_DATA_ RX_DATA_WRI
WRITTEN TTEN
R/W-0h R/W-0h
17 16
RX_NOK RX_OK
R/W-0h R/W-0h
9 8
TX_RETRANS TX_CTRL_ACK
_ACK
R/W-0h R/W-0h
1 0
LAST_COMMA COMMAND_D
ND_DONE ONE
R/W-0h R/W-0h
1615
Radio