Texas Instruments SimpleLink CC2620 Technical Reference Manual page 1137

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14.4.1.6 CHCTL Register (Offset = 14h) [reset = 0h]
CHCTL is shown in
Channel Configuration.
31 30
23 22
15 14
7 6
Bit Field
31-19 RESERVED
18 CH2_CONT_EN
17 RESERVED
16 CH2_EN
15-10 RESERVED
9 CH1_CAPT_EN
8 CH1_EN
7-1 RESERVED
0 CH0_EN
SWCU117C – February 2015 – Revised September 2015
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Figure 14-7 and described in
Figure 14-7. CHCTL Register
29 28
RESERVED
21 20
RESERVED
R-0h
13 12
RESERVED
R-0h
5 4
RESERVED
R-0h
Table 14-7. CHCTL Register Field Descriptions
Type Reset
R 0h
R/W 0h
R 0h
R/W 0h
R 0h
R/W 0h
R/W 0h
R 0h
R/W 0h
Copyright © 2015, Texas Instruments Incorporated
Table 14-7.
27 26
R-0h
19 18
CH2_CONT_E
N
R/W-0h
11 10
3 2
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Set to enable continuous operation of Channel 2
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
RTC Channel 2 Enable
0: Disable RTC Channel 2
1: Enable RTC Channel 2
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Set Channel 1 mode
0: Compare mode (default)
1: Capture mode
RTC Channel 1 Enable
0: Disable RTC Channel 1
1: Enable RTC Channel 1
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
RTC Channel 0 Enable
0: Disable RTC Channel 0
1: Enable RTC Channel 0
Real-Time Clock Registers
25 24
17 16
RESERVED CH2_EN
R-0h R/W-0h
9 8
CH1_CAPT_E CH1_EN
N
R/W-0h R/W-0h
1 0
CH0_EN
R/W-0h
1137
Real-Time Clock