Texas Instruments SimpleLink CC2620 Technical Reference Manual page 1357

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19.7.1.8 CTL Register (Offset = 30h) [reset = 300h]
CTL is shown in Figure 19-11
Control
31 30
23 22
15 14
CTSEN RTSEN
R/W-0h R/W-0h
7 6
LBE
R/W-0h
Bit Field
31-16 RESERVED
15 CTSEN
14 RTSEN
13-12 RESERVED
11 RTS
10 RESERVED
9 RXE
8 TXE
7 LBE
6-1 RESERVED
SWCU117C – February 2015 – Revised September 2015
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and described in Table
Figure 19-11. CTL Register
29 28
RESERVED
R-0h
21 20
RESERVED
R-0h
13 12
RESERVED
R/W-0h
5 4
RESERVED
R/W-0h
Table 19-11. CTL Register Field Descriptions
Type Reset Description
R 0h
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
R/W 0h
CTS hardware flow control enable
0h = CTS hardware flow control disabled
1h = CTS hardware flow control enabled
R/W 0h
RTS hardware flow control enable
0h = RTS hardware flow control disabled
1h = RTS hardware flow control enabled
R/W 0h
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
R/W 0h Request to Send
This bit is the complement of the active-low UART RTS output. That
is, when the bit is programmed to a 1 then RTS output on the pins is
LOW.
R/W 0h
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
R/W 1h UART Receive Enable
If the UART is disabled in the middle of reception, it completes the
current character before stopping.
0h = UART Receive disabled
1h = UART Receive enabled
R/W 1h UART Transmit Enable
If the UART is disabled in the middle of transmission, it completes
the current character before stopping.
0h = UART Transmit disabled
1h = UART Transmit enabled
R/W 0h UART Loop Back Enable:
Enabling the loop-back mode connects the UARTTXD output from
the UART to UARTRXD input of the UART.
0h = Loop Back disabled
1h = Loop Back enabled
R/W 0h
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Universal Asynchronous Receivers and Transmitters (UARTS)
Copyright © 2015, Texas Instruments Incorporated
19-11.
27 26
19 18
11 10
RTS RESERVED
R/W-0h R/W-0h
3 2
UARTS Registers
25 24
17 16
9 8
RXE TXE
R/W-1h R/W-1h
1 0
UARTEN
R/W-0h
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