Texas Instruments SimpleLink CC2620 Technical Reference Manual page 1353

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19.7.1.5 IBRD Register (Offset = 24h) [reset = 0h]
IBRD is shown in Figure 19-8
Integer Baud-Rate Divisor
If this register is modified while transmission or reception is on-going, the baud rate will not be updated
until transmission or reception of the current character is complete.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
RESERVED
Bit Field
31-16 RESERVED
15-0 DIVINT
SWCU117C – February 2015 – Revised September 2015
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and described in
Figure 19-8. IBRD Register
R/W-0h
Table 19-8. IBRD Register Field Descriptions
Type Reset
R/W 0h
R/W 0h
Copyright © 2015, Texas Instruments Incorporated
Table 19-8.
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
The integer baud rate divisor:
The baud rate divisor is calculated using the formula below:
Baud rate divisor = (UART reference clock frequency) / (16 * Baud
rate)
Baud rate divisor must be minimum 1 and maximum 65535.
That is, DIVINT=0 does not give a valid baud rate.
Similarly, if DIVINT=0xFFFF, any nonzero values in FBRD.DIVFRAC
will be illegal.
A valid value must be written to this field before the UART can be
used for RX or TX operations.
Universal Asynchronous Receivers and Transmitters (UARTS)
UARTS Registers
9 8 7 6 5 4 3 2
DIVINT
R/W-0h
1 0
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