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22.8.2 Starting Input and Output Pins
The I2S:STMPINTRIG and the I2S:STMPOUTTRIG registers contain WCLK counter compare values that
are used to start the input and output audio streaming, respectively:
•
When the WCLK counter value reaches the I2S:STMPINTRIG register and the I2S:STMPCTL.IN_RDY
register is set, the memory interface controller begins storing samples to memory in the next frame:
((STMPINTRIG + 1) % STMPWPER).
•
When the WCLK counter value reaches the I2S:STMPOUTTRIG register and the
I2S:STMPCTL.OUT_RDY register is set, the memory interface controller begins outputting samples
loaded from memory in the next frame: ((STMPINTRIG + 1) % STMPWPER).
22.8.3 Samplestamp Capturing
A pulse on samplestamp_req captures the XOSC and WCLK counter values for later retrieval:
•
I2S:STMPXCNTCAPTn = the XOSC counter at time of capture
•
I2S:STMPXPER = the number of XOSC cycles in the previous WCLK period
•
I2S:STMPWCNTCAPTn = the WCLK counter at time of capture
The samplestamp value used is a fixed-point number, INT.FRAC, where:
•
INT = I2S:STMPWCNTCAPTn
•
FRAC = I2S:STMPXCNTCAPTn and I2S:STMPXPER
NOTE: Because the I2S:STMPXPER register is in the previous period value, saturation of the
I2S:STMPXCNTCAPTn registers must be handled in software (if required).
NOTE: The samplestamp_req pulse can be generated by different radio events that are configured
outside the I2S module, see the EVENT:I2SSTMPSEL0 register.
SWCU117C – February 2015 – Revised September 2015
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Samplestamp Generator
Integrated Interchip Sound (I2S) Module
1437
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