Texas Instruments SimpleLink CC2620 Technical Reference Manual page 863

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10.2.1.32 ALGSEL Register (Offset = 700h) [reset = 0h]
ALGSEL is shown in
Master Algorithm Select
This register configures the internal destination of the DMA controller.
31 30
TAG
R/W-0h
23 22
15 14
7 6
Bit Field
31 TAG
30-2 RESERVED
1 AES
0 KEY_STORE
SWCU117C – February 2015 – Revised September 2015
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Figure 10-34 and described in
Figure 10-34. ALGSEL Register
29 28
21 20
RESERVED
13 12
RESERVED
5 4
RESERVED
R/W-0h
Table 10-42. ALGSEL Register Field Descriptions
Type Reset
R/W 0h
R/W 0h
R/W 0h
R/W 0h
Copyright © 2015, Texas Instruments Incorporated
Table 10-42.
27 26
RESERVED
R/W-0h
19 18
R/W-0h
11 10
R/W-0h
3 2
Description
If this bit is cleared to 0, the DMA operation involves only data.
If this bit is set, the DMA operation includes a TAG (Authentication
Result / Digest).
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
If set to 1, the AES data is loaded through DMA
Both Read and Write maximum transfer size to DMA engine is set to
16 bytes
If set to 1, selects the Key Store to be loaded through DMA.
The maximum transfer size to DMA engine is set to 32 bytes
(however transfers of 16, 24 and 32 bytes are allowed)
Cryptography Registers
25 24
17 16
9 8
1 0
AES KEY_STORE
R/W-0h R/W-0h
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