Texas Instruments SimpleLink CC2620 Technical Reference Manual page 1489

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23.3.2.8 External Signaling
The radio CPU controls the signals CPEGPO0 and CPEGPO1. For control of an external front end,
CPEGPO0 is high when the LNA must be enabled and low otherwise. CPEGPO1 is high when the PA
must be enabled and low otherwise. The radio CPU also controls the signal CPEGPO2 to go high when
synthesizer calibration starts, and low when the calibration is done. This control can be used for
debugging.
Two of the output signals from the radio timer have automatic configuration that may be used for
observation. The signal RATGPO0 goes high when transmission of a packet is initiated and low when
transmission is done. The RATGPO0 signal may be observed for accurate timing of packet transmission,
as the same signal is used internally. The signal is very similar to CPEGPO1, but it goes high some
microseconds earlier, and the timing is more accurate compared to the first transmitted symbol out of the
modem. However, CPEGPO1 is recommended for control of external PA to avoid turning it on too early.
The signal RATGPO1 may be configured to go high when sync is found in the receiver, and low when the
packet is received or reception aborted (this does not work for the IEEE 802.15.4 receiver command). The
RATGPO1 signal is configured with the radio firmware configuration parameter gpoContol. The other radio
timer outputs may be configured to generate events as required, using CMD_SET_RAT_OUTPUT.
By default, the radio CPU maps CPEGPO0 to the signal RFC_GPO0, CPEGPO1 to the signal
RFC_GPO1, CPEGPO2 to the signal RFC_GPO2, and RATGPO0 to the signal RFC_GPO3 at boot time.
This mapping can be modified by writing to the RFC_DBELL:SYSGPOCTL register.
The RFC_GPO signals can be mapped to output pins using the system I/O controller.
SWCU117C – February 2015 – Revised September 2015
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