Texas Instruments SimpleLink CC2620 Technical Reference Manual page 1059

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12.5.1.3 CTRL Register (Offset = 8h) [reset = 0h]
CTRL is shown in
Channel Control Data Base Pointer
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit Field
31-10 BASEPTR
9-0 RESERVED
SWCU117C – February 2015 – Revised September 2015
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Figure 12-9 and described in
Figure 12-9. CTRL Register
BASEPTR
R/W-0h
Table 12-10. CTRL Register Field Descriptions
Type Reset
R/W 0h
R/W 0h
Copyright © 2015, Texas Instruments Incorporated
Table 12-10.
9
Description
This register point to the base address for the primary data
structures of each DMA channel. This is not stored in module, but in
system memory, thus space must be allocated for this usage when
DMA is in usage
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Micro Direct Memory Access (µDMA)
µDMA Registers
8 7 6 5 4 3 2 1
RESERVED
R/W-0h
0
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