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Texas Instruments SimpleLink CC2620 Technical Reference Manual page 1366

Zigbee rf4ce wireless mcu simplelink cc13 series; simplelink cc26 series

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UARTS Registers
19.7.1.13 ICR Register (Offset = 44h) [reset = X]
ICR is shown in
Figure 19-16
Interrupt Clear
On a write of 1, the corresponding interrupt is cleared. A write of 0 has no effect.
31
30
23
22
15
14
7
6
FEIC
RTIC
W-X
W-X
Bit
Field
31-11
RESERVED
10
OEIC
9
BEIC
8
PEIC
7
FEIC
6
RTIC
5
TXIC
4
RXIC
3-2
RESERVED
1
CTSMIC
0
RESERVED
1366
Universal Asynchronous Receivers and Transmitters (UARTS)
and described in
Table
Figure 19-16. ICR Register
29
28
RESERVED
W-0h
21
20
RESERVED
W-0h
13
12
RESERVED
W-0h
5
4
TXIC
RXIC
W-X
W-X
Table 19-16. ICR Register Field Descriptions
Type
Reset
W
0h
W
X
W
X
W
X
W
X
W
X
W
X
W
X
W
X
W
X
W
X
Copyright © 2015, Texas Instruments Incorporated
19-16.
27
26
19
18
11
10
OEIC
W-X
3
2
RESERVED
W-X
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Overrun error interrupt clear:
Writing 1 to this field clears the overrun error interrupt (RIS.OERIS).
Writing 0 has no effect.
Break error interrupt clear:
Writing 1 to this field clears the break error interrupt (RIS.BERIS).
Writing 0 has no effect.
Parity error interrupt clear:
Writing 1 to this field clears the parity error interrupt (RIS.PERIS).
Writing 0 has no effect.
Framing error interrupt clear:
Writing 1 to this field clears the framing error interrupt (RIS.FERIS).
Writing 0 has no effect.
Receive timeout interrupt clear:
Writing 1 to this field clears the receive timeout interrupt
(RIS.RTRIS). Writing 0 has no effect.
Transmit interrupt clear:
Writing 1 to this field clears the transmit interrupt (RIS.TXRIS).
Writing 0 has no effect.
Receive interrupt clear:
Writing 1 to this field clears the receive interrupt (RIS.RXRIS).
Writing 0 has no effect.
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior. Write 0
Clear to Send (CTS) modem interrupt clear:
Writing 1 to this field clears the clear to send interrupt
(RIS.CTSRMIS). Writing 0 has no effect.
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior. Write 0.
SWCU117C – February 2015 – Revised September 2015
www.ti.com
25
24
17
16
9
8
BEIC
PEIC
W-X
W-X
1
0
CTSMIC
RESERVED
W-X
W-X
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