Texas Instruments SimpleLink CC2620 Technical Reference Manual page 1212

Modules
NOTE: When this clock is enabled, the system cannot go into standby or shutdown mode because
the system still has a dependency on the SCLK_HF setting.
17.4.8.8 Sampling
The ADC can start sampling on events from a number of different sources in AUX and AON, I/O events on
the AUX IOs, and the general purpose timers in MCU (through the event fabric).
The source and start polarity is configured in the AUX_ANAIF:ADCCTL register. For software triggered
sampling, set the start source to an unused value and write to AUX_ANAIF:ADCTRIG register.
17.4.8.9 FIFO
The ADC FIFO is a 4-element large FIFO for storing the results of ADC conversions.
ADC samples can be read from the FIFO register, AUX_ANAIF:ADCFIFO. When a sample is read, it is
popped from the FIFO and can be stored by the user.
Statuses and errors in the FIFO are found in the AUX_ANAIF:ADCFIFOSTAT register.
To recover from an FIFO overflow or underflow condition, the FIFO must be flushed by writing the flush
command to AUX_ANAIF:ADCCTL.CMD and then enabling the ADC interface again.
NOTE: When debugging the software, showing the ADCFIFO register causes JTAG to read the
FIFO, which pops the sample from the FIFO, and consequently the software cannot read it.
17.4.8.10 Interrupts and Events
The ADC events found in event control are output to allow other modules to trigger on ADC events or to
interrupt the system CPU. These are edge-triggered and must be cleared by software.
17.4.8.11 DMA Usage
The ADC can be used together with DMA to allow data transfer from the ADC FIFO to any other memory-
mapped location without CPU involvement.
To configure the ADC to trigger a DMA transfer, the corresponding DMA channel #7 must be set up in the
µDMA module.
After configuring the µDMA, configuration of a DMA trigger for the ADC is done in the
AUX_EVCTL:DMACTL register.
The trigger of a DMA transfer can be done by two different FIFO events: ADC_ FIFO_NOT_EMPTY (1 or
more samples available) or ADC_FIFO_ALMOST_FULL (3/4 full).
The type of DMA request must also be configured (burst or single transfer). If using single transfers, the
µDMA must be set up to copy 1 sample, while a burst transfer must copy no more than 3 samples to avoid
underflow.
When using µDMA, the AUX_ADC_IRQ event is set when the DMA transfer is done to allow the system
CPU to be interrupted, which occurs for ADC DMA transfer done, ADC FIFO underflow, and ADC FIFO
overflow.
17.4.8.12 Usage Example – Single Shot ADC Measurement
17.4.8.12.1 Enable Interface Clocks and ADC Clocks
1. Enable the clock for the AUX analog interface with the AUX_WUC:MODCLKEN0.SOC register and for
the ADI interface with the AUX_WUC:MODCLKEN0.ADI register.
2. Request clock for the ADC core; wait until request is acknowledged in the AUX_WUC:ADCCLKCTL
register.
1212
AUX – Sensor Controller with Digital and Analog Peripherals
Copyright © 2015, Texas Instruments Incorporated
SWCU117C – February 2015 – Revised September 2015
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