Texas Instruments SimpleLink CC2620 Technical Reference Manual page 1448

I2S Registers
22.10.1.8 AIFPWMVALUE Register (Offset = 1Ch) [reset = 0h]
AIFPWMVALUE is shown in
Audio Interface PWM Debug Value
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
RESERVED
Bit Field
31-16 RESERVED
15-0 PULSE_WIDTH
1448
Integrated Interchip Sound (I2S) Module
Figure 22-16 and described in
Figure 22-16. AIFPWMVALUE Register
R-0h
Table 22-9. AIFPWMVALUE Register Field Descriptions
Type Reset
R 0h
R/W 0h
Copyright © 2015, Texas Instruments Incorporated
Table 22-9.
9
PULSE_WIDTH
R/W-0h
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
The value written to this register determines the width of the active
high PWM pulse (pwm_debug), which starts together with MSB of
the first output word in a DMA buffer:
0x0000: Constant low
0x0001: Width of the pulse (number of BCLK cycles, here 1).
...
0xFFFE: Width of the pulse (number of BCLK cycles, here 65534).
0xFFFF: Constant high
SWCU117C – February 2015 – Revised September 2015
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