Texas Instruments SimpleLink CC2620 Technical Reference Manual page 1107

www.ti.com
13.5.1.11 TBILR Register (Offset = 2Ch) [reset = FFFFh]
TBILR is shown in
Timer B Interval Load Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit Field
31-0 TBILR
SWCU117C – February 2015 – Revised September 2015
Submit Documentation Feedback
Figure 13-19 and described in
Figure 13-19. TBILR Register
Table 13-18. TBILR Register Field Descriptions
Type Reset
R/W FFFFh
Copyright © 2015, Texas Instruments Incorporated
Table 13-18.
TBILR
R/W-FFFFh
Description
GPT Timer B Interval Load Register
General-purpose Timer Registers
9 8 7 6 5 4 3 2
Timers
1 0
1107