Texas Instruments SimpleLink CC2620 Technical Reference Manual page 1067

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12.5.1.11 SETCHANNELEN Register (Offset = 28h) [reset = 0h]
SETCHANNELEN is shown in
Set Channel Enable
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit Field
31-0 CHNLS
SWCU117C – February 2015 – Revised September 2015
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Figure 12-17 and described in
Figure 12-17. SETCHANNELEN Register
CHNLS
R/W-0h
Table 12-18. SETCHANNELEN Register Field Descriptions
Type Reset
R/W 0h
Copyright © 2015, Texas Instruments Incorporated
Table 12-18.
9
Description
Returns the enable status of the channels, or enables the
corresponding channels.
Read as:
Bit [Ch] = 0: Channel Ch is disabled.
Bit [Ch] = 1: Channel Ch is enabled.
Write as:
Bit [Ch] = 0: No effect. Use the CLEARCHANNELEN.CHNLS to
disable a channel
Bit [Ch] = 1: Enables channel Ch
Writing to a bit where a DMA channel is not implemented has no
effect
Micro Direct Memory Access (µDMA)
µDMA Registers
8 7 6 5 4 3 2 1 0
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