Texas Instruments SimpleLink CC2620 Technical Reference Manual page 885

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11.11.1.5 CLK32KCTL Register (Offset = 10h) [reset = 1h]
CLK32KCTL is shown in
SCLK_LF External Output Control
31 30
23 22
15 14
7 6
Bit Field
31-1 RESERVED
0 OE_N
SWCU117C – February 2015 – Revised September 2015
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Figure 11-7 and described in
Figure 11-7. CLK32KCTL Register
29 28
RESERVED
R-0h
21 20
RESERVED
R-0h
13 12
RESERVED
R-0h
5 4
RESERVED
R-0h
Table 11-9. CLK32KCTL Register Field Descriptions
Type Reset
R 0h
R/W 1h
Copyright © 2015, Texas Instruments Incorporated
Table 11-9.
27 26
19 18
11 10
3 2
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
0: Output enable active. SCLK_LF output on IO pin that has
PORT_ID (e.g. IOC:IOCFG0.PORT_ID) set to AON_CLK32K.
1: Output enable not active
I/O Control Registers
25 24
17 16
9 8
1 0
OE_N
R/W-1h
885
I/O Control