Texas Instruments SimpleLink CC2620 Technical Reference Manual page 1403

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Figure 21-10. Master RECEIVE With Repeated Start Condition
Idle
Write slave address
Sequence may be
to I2C_MSA
omitted in a single
Read I2C_MSTAT
No
BUSY bit = 0?
Yes
Write 0 ±1011 to
I2C_MCTRL
Error service
Read data from
Idle
I2C_MDR
SWCU117C – February 2015 – Revised September 2015
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master system.
Write 0 ± 1001 to
I2C_MCTRL
No
ERR bit = 0?
Yes
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Read I2C_MSTAT
No
BUSY bit = 0?
Yes
ERR bit = 0?
No
Yes
Read data from
I2C_MDR
No
Index = m - 1?
Yes
Write 0 ± 101 to
I2C_MCTRL
Read I2C_MSTAT
BUSY bit = 0?
Yes No
Inter-Integrated Circuit (I
Functional Description
ARBLST bit = 1?
No
Write 0 ± 100 to
Yes
I2C_MCTRL
Error serivce
Idle
1403
2
C) Interface