Texas Instruments SimpleLink CC2620 Technical Reference Manual page 1305

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17.7.7.10 TDCCLKCTL Register (Offset = 34h) [reset = 0h]
TDCCLKCTL is shown in
TDC Clock Control
Controls the TDC counter clock source, which steps the TDC counter value
The source of this clock is controlled by OSC_DIG:CTL0.ACLK_TDC_SRC_SEL.
31 30 29 28
15 14 13 12
Bit Field
31-2 RESERVED
1 ACK
0 REQ
SWCU117C – February 2015 – Revised September 2015
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Figure 17-71 and described in
Figure 17-71. TDCCLKCTL Register
27 26 25 24
RESERVED
R-0h
11 10 9 8
RESERVED
R-0h
Table 17-96. TDCCLKCTL Register Field Descriptions
Type Reset
R 0h
R 0h
R/W 0h
Copyright © 2015, Texas Instruments Incorporated
AUX – Sensor Controller Registers
Table 17-96.
23 22 21 20
7 6 5 4
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Acknowledges the last value written to REQ.
Enables (1) or disables (0) the TDC counter clock source.
This bit must not be modified unless ACK matches the current value.
AUX – Sensor Controller with Digital and Analog Peripherals
19 18 17 16
3 2 1 0
ACK REQ
R-0h R/W-
0h
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