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Texas Instruments SimpleLink CC2620 Technical Reference Manual page 1135

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14.4.1.4 SUBSEC Register (Offset = Ch) [reset = 0h]
SUBSEC is shown in
Second Counter Value, Fractional Part
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit
Field
31-0
VALUE
SWCU117C – February 2015 – Revised September 2015
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Figure 14-5
and described in
Figure 14-5. SUBSEC Register
Table 14-5. SUBSEC Register Field Descriptions
Type
Reset
R/W
0h
Copyright © 2015, Texas Instruments Incorporated
Table
14-5.
VALUE
R/W-0h
Description
Unsigned integer representing Real Time Clock in fractions of a
32
second (VALUE/2
seconds) at the time when SEC register was
read.
Examples :
0x0000_0000 = 0.0 sec
0x4000_0000 = 0.25 sec
0x8000_0000 = 0.5 sec
0xC000_0000 = 0.75 sec
Real-Time Clock Registers
9
8
7
6
5
4
3
2
Real-Time Clock
1
0
1135

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