Texas Instruments SimpleLink CC2620 Technical Reference Manual page 1171

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16.7.1.6 CTL Register (Offset = 14h) [reset = 0h]
CTL is shown in Figure 16-9
Control
31 30
23 22
15 14
7 6
Bit Field
31-16 STARTUP_CYCLES
15-11 RESERVED
10 TRNG_EN
9-3 RESERVED
2 NO_LFSR_FB
1 TEST_MODE
0 RESERVED
SWCU117C – February 2015 – Revised September 2015
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and described in Table
Figure 16-9. CTL Register
29 28
STARTUP_CYCLES
R/W-0h
21 20
STARTUP_CYCLES
R/W-0h
13 12
RESERVED
R-0h
5 4
RESERVED
R-0h
Table 16-11. CTL Register Field Descriptions
Type Reset
R/W 0h
R 0h
R/W 0h
R 0h
R/W 0h
R/W 0h
R/W 0h
Copyright © 2015, Texas Instruments Incorporated
Random Number Generator Registers
16-11.
27 26
19 18
11 10
TRNG_EN
R/W-0h
3 2
NO_LFSR_FB
R/W-0h
Description
This field determines the number of samples (between 2
taken to gather entropy from the FROs during startup. If the written
value of this field is zero, the number of samples is 2
number of samples equals the written value times 2
24
0x0000: 2 samples
8
0x0001: 1*2 samples
8
0x0002: 2*2 samples
8
0x0003: 3*2 samples
...
8
0x8000: 32768*2 samples
8
0xC000: 49152*2 samples
...
8
0xFFFF: 65535*2 samples
This field can only be modified while TRNG_EN is 0. If 1 an update
will be ignored.
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
0: Forces all TRNG logic back into the idle state immediately.
1: Starts TRNG, gathering entropy from the FROs for the number of
samples determined by STARTUP_CYCLES.
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
1: Remove XNOR feedback from the main LFSR, converting it into a
normal shift register for the XOR-ed outputs of the FROs (shifting
data in on the LSB side). A '1' also forces the LFSR to sample
continuously.
This bit can only be set to '1' when TEST_MODE is also set to '1'
and must not be used for other than test purposes
1: Enables access to the TESTCNT and LFSR0/LFSR1/LFSR2
registers (the latter are automatically cleared before enabling
access) and keeps IRQFLAGSTAT.NEED_CLOCK at '1'.
This bit shall not be used unless you need to change the LFSR seed
prior to creating a new random value. All other testing is done
external to register control.
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
25 24
17 16
9 8
RESERVED
R-0h
1 0
TEST_MODE RESERVED
R/W-0h R/W-0h
8 24
and 2
24
, otherwise the
8
.
Random Number Generator
)
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