UARTS Registers
Bit
Field
0
BRK
1356
Universal Asynchronous Receivers and Transmitters (UARTS)
Table 19-10. LCRH Register Field Descriptions (continued)
Type
Reset
R/W
0h
Copyright © 2015, Texas Instruments Incorporated
Description
UART Send Break
If this bit is set to 1, a low-level is continually output on the
UARTTXD output pin, after completing transmission of the current
character. For the proper execution of the break command, the
software must set this bit for at least two complete frames. For
normal use, this bit must be cleared to 0.
SWCU117C – February 2015 – Revised September 2015
www.ti.com
Submit Documentation Feedback