Texas Instruments SimpleLink CC2620 Technical Reference Manual page 1458

I2S Registers
22.10.1.18 STMPINTRIG Register (Offset = 48h) [reset = 0h]
STMPINTRIG is shown in
WCLK Counter Trigger Value for Input Pins
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
RESERVED
Bit Field
31-16 RESERVED
15-0 IN_START_WCNT
1458
Integrated Interchip Sound (I2S) Module
Figure 22-26 and described in
Figure 22-26. STMPINTRIG Register
R-0h
Table 22-19. STMPINTRIG Register Field Descriptions
Type Reset
R 0h
R/W 0h
Copyright © 2015, Texas Instruments Incorporated
Table 22-19.
9
IN_START_WCNT
R/W-0h
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Compare value used to start the incoming audio streams.
This bit field shall equal the WCLK counter value during the WCLK
period in which the first input word(s) are sampled and stored to
memory (that is the sample at the start of the very first DMA input
buffer).
The value of this register takes effect when the following conditions
are met:
- One or more pins are configured as inputs in AIFDIRCFG.
- AIFDMACFG has been configured for the correct buffer size, and
at least 32 BCLK cycle ticks have happened.
Note: To avoid false triggers, this bit field must be set higher than
STMPWPER.VALUE.
SWCU117C – February 2015 – Revised September 2015
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