Texas Instruments SimpleLink CC2620 Technical Reference Manual page 1454

I2S Registers
22.10.1.14 STMPXCNTCAPT0 Register (Offset = 38h) [reset = 0h]
STMPXCNTCAPT0 is shown in
Captured XOSC Counter Value, Capture Channel 0
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
RESERVED
Bit Field
31-16 RESERVED
15-0 CAPT_VALUE
1454
Integrated Interchip Sound (I2S) Module
Figure 22-22
Figure 22-22. STMPXCNTCAPT0 Register
R-0h
Table 22-15. STMPXCNTCAPT0 Register Field Descriptions
Type Reset
R 0h
R 0h
Copyright © 2015, Texas Instruments Incorporated
and described in Table 22-15.
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
The value of the samplestamp XOSC counter
(STMPXCNT.CURR_VALUE) last time an event was pulsed (event
source selected in [EVENT.I2SSTMPSEL0.EV] for channel 0). This
number corresponds to the number of 24 MHz clock cycles since the
last positive edge of the selected WCLK.
The value is cleared when STMPCTL.STMP_EN = 0.
Note: Due to buffering and synchronization, WCLK is delayed by a
small number of BCLK periods and clk periods.
Note: When calculating the fractional part of the sample stamp,
STMPXPER may be less than this bit field.
SWCU117C – February 2015 – Revised September 2015
www.ti.com
9 8 7 6 5 4 3 2
CAPT_VALUE
R-0h
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