Texas Instruments SimpleLink CC2620 Technical Reference Manual page 1467

www.ti.com
22.10.1.27 IRQMASK Register (Offset = 70h) [reset = 0h]
IRQMASK is shown in
Masked Interrupt Status Register
31 30
23 22
15 14
7 6
RESERVED
R/W-0h
Bit Field
31-6 RESERVED
5 AIF_DMA_IN
4 AIF_DMA_OUT
3 WCLK_TIMEOUT
2 BUS_ERR
1 WCLK_ERR
0 PTR_ERR
SWCU117C – February 2015 – Revised September 2015
Submit Documentation Feedback
Figure 22-35 and described in
Figure 22-35. IRQMASK Register
29 28
RESERVED
R/W-0h
21 20
RESERVED
R/W-0h
13 12
RESERVED
R/W-0h
5 4
AIF_DMA_IN AIF_DMA_OUT
R/W-0h R/W-0h
Table 22-28. IRQMASK Register Field Descriptions
Type Reset
R/W 0h
R/W 0h
R/W 0h
R/W 0h
R/W 0h
R/W 0h
R/W 0h
Copyright © 2015, Texas Instruments Incorporated
Table 22-28.
27 26
19 18
11 10
3 2
WCLK_TIMEO BUS_ERR
UT
R/W-0h R/W-0h
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Defines the masks state for the interrupt of IRQFLAGS.AIF_DMA_IN
0: Disable
1: Enable
Defines the masks state for the interrupt of
IRQFLAGS.AIF_DMA_OUT
0: Disable
1: Enable
Defines the masks state for the interrupt of
IRQFLAGS.WCLK_TIMEOUT
0: Disable
1: Enable
Defines the masks state for the interrupt of IRQFLAGS.BUS_ERR
0: Disable
1: Enable
Defines the masks state for the interrupt of IRQFLAGS.WCLK_ERR
0: Disable
1: Enable
Defines the masks state for the interrupt of IRQFLAGS.PTR_ERR
0: Disable
1: Enable
Integrated Interchip Sound (I2S) Module
I2S Registers
25 24
17 16
9 8
1 0
WCLK_ERR PTR_ERR
R/W-0h R/W-0h
1467