µDMA Registers
12.5.1.10 CLEARREQMASK Register (Offset = 24h) [reset = 0h]
CLEARREQMASK is shown in
Clear Channel Request Mask
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit
Field
31-0
CHNLS
1066
Micro Direct Memory Access (µDMA)
Figure 12-16
and described in
Figure 12-16. CLEARREQMASK Register
CHNLS
Table 12-17. CLEARREQMASK Register Field Descriptions
Type
Reset
W
0h
Copyright © 2015, Texas Instruments Incorporated
Table
12-17.
9
W-0h
Description
Set the appropriate bit to enable DMA request for the channel.
Write as:
Bit [Ch] = 0: No effect. Use the SETREQMASK.CHNLS to disable
channel C from generating requests.
Bit [Ch] = 1: Enables channel [C] to generate DMA requests.
Writing to a bit where a DMA channel is not implemented has no
effect.
SWCU117C – February 2015 – Revised September 2015
www.ti.com
8
7
6
5
4
3
2
1
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