Texas Instruments SimpleLink CC2620 Technical Reference Manual page 1058

µDMA Registers
12.5.1.2 CFG Register (Offset = 4h) [reset = 0h]
CFG is shown in Figure 12-8
Configuration
31 30
23 22
15 14
7 6
PRTOCTRL
W-0h
Bit Field
31-8 RESERVED
7-5 PRTOCTRL
4-1 RESERVED
0 MASTERENABLE
1058
Micro Direct Memory Access (µDMA)
and described in Table
Figure 12-8. CFG Register
29 28
RESERVED
W-0h
21 20
RESERVED
W-0h
13 12
RESERVED
W-0h
5 4
Table 12-9. CFG Register Field Descriptions
Type Reset Description
W 0h
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
W 0h Sets the AHB-Lite bus protocol protection state by controlling the
AHB signal HProt[3:1] as follows:
Bit [7] Controls HProt[3] to indicate if a cacheable access is
occurring.
Bit [6] Controls HProt[2] to indicate if a bufferable access is
occurring.
Bit [5] Controls HProt[1] to indicate if a privileged access is
occurring.
When bit [n] = 1 then the corresponding HProt is high.
When bit [n] = 0 then the corresponding HProt is low.
W 0h
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
W 0h Enables the controller:
0: Disables the controller
1: Enables the controller
Copyright © 2015, Texas Instruments Incorporated
12-9.
27 26
19 18
11 10
3 2
RESERVED
W-0h
SWCU117C – February 2015 – Revised September 2015
www.ti.com
25 24
17 16
9 8
1 0
MASTERENAB
LE
W-0h
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